1. Field of the Invention
This invention relates to an inverter, and more particularly to an inverter which includes two switching elements effecting switching actions in the same phase or in opposite phases.
2. Description of the Prior Art
A conventional inverter circuit is knwon as a circuit for conversion from DC to AC. A stepped-up or stepped-down DC voltage is obtained by rectifying the AC output of the inverter circuit. The power unit using such inverter circuit needs no power transformer of commercial frequency, and so it can be smaller-sized.
FIG. 1 shows a well-known full bridge inverter circuit which is a kind of such inverter circuit.
The inverter circuit of FIG. 1 comprises a saturable transformer 5 having a hysteresis characteristic and two pairs of transistors for driving the transformer 15, i.e., a pair of transistors 1 and 4 and a pair of transistors 2 and 3. The transistors 1 and 2 form a cascade connection with each other, and transistors 3 and 4 form a cascade connection with each other. Each windings 6, 7, 8 and 9 of the transformer 5 is connected between base and emitter of each transistor 1, 2, 3 and 4. The windings 6 to 9 are wound in the direction that the magnetic flux in a predetermined direction generated in the transformer 5 puts one pair of transistors 1 and 4 or 2 and 3 into the on-state, and simultaneously puts the other pair into the off-state.
The collectors of the transistors 1 and 3 are connected in common to a positive power supply terminal 21. The emitters of the transistors 2 and 4 are connected in common to a negative power supply terminal 22. A primary winding 17 of an output transformer 15 is connected between the connecting point A of the cascade connection of the transistors 1 and 2 and the connecting point B of the cascade connection of the transistors 3 and 4.
The output transformer 15 has the primary winding 17 and secondary windings 16 and 18. A current proportional to the current flowing through the primary winding 17 is fed back to a winding 11 of the transformer 5 through a transformer 14. A voltage proportional to the voltage developed across the primary winding 17 is detected by the secondary winding 16 to be fed back to a winding 10 of the transformer 5. The DC voltage applied to the power supply terminals 21 and 22 is converted to a desired AC voltage which is led out through the secondary winding 18 of the output transformer 15.
The operation of the inverter circuit of FIG. 1 will be described in brief. When starting magnetic flux in the one direction, for example, A-direction of FIG. 1, is developed by a starting winding (not shown), voltages are generated across each windings 6 to 9 to put the pair of transistors 1 and 4 into the on-state and the pair of transistors 2 and 3 into the off-state. In such state, current flows from the positive power supply terminal 21 to the negative power supply terminal 22 through the transistor 1, winding 17, transformer 14 and transistor 4. The change of the current is fed back to the windings 10 and 11 respectively through the windings 17 and 16 of the transformer 15 and the transformer 14, which encourages the starting flux. As the result, the feedback currents to the windings 10 and 11 increases more. Such positive feedback condition is continued until the transformer 5 becomes saturated. When the transformer 5 is saturated, there is no further increase of flux. Thus, voltages are not developed across the windings 6 and 9, so that the transistors 1 and 4 turn into the off-state.
When the transistors 1 and 4 begin to turn off, the flux of the transformer 5 in the direction A decreases, which develops the voltages across the windings 7 and 8 to put the transistors 2 and 3 into the on-state. When the transistors 2 and 3 turn into the on-state and the transistors 1 and 4 turn into the off-state, current flows from the positive power supply terminal 21 to the negative power supply terminal 22 through the transistor 3, transformer 14, winding 17 and transistor 2. The change of the current is fed back to the windings 10 and 11 of the transformer 5, which produces the flux of the transformer 5 in the direction B. The development of the flux increases the feedback currents to the windings 10 and 11. Similarly to the above, the positive feedback condition is continued until the transformer 5 becomes saturated. When the transformer 5 is saturated, the flux is not further increased. Thus, voltages are not developed across the windings 7 and 8, so that the transistors 2 and 3 turn into the off-state.
An alternating output voltage being of approximately square waveform is obtained across the winding 18 of the output transformer 15 through the repetition of such switching operation. Whe waveforms of the base currents i.sub.b1 .about. i.sub.b4 of the transistors 1-4 during the switching operation are shown in FIG. 2. Spike at each trailing transitions of the base currents i.sub.b1 .about. i.sub.b4 is caused by discharging charges stored in each of the bases of the transistors 1 to 4. The transistors 1 to 4 turn from the on-state into the off-state after discharge of the storage charges.
The base currents i.sub.b1 and i.sub.b2, i.sub.b3 and i.sub.b4 have the following relation with a current i.sub.e flowing through the winding 10 and a current i.sub.c flowing through the winding 11 caused by feedback; EQU i.sub.b1 + i.sub.b4 = i.sub.b2 + i.sub.b3 = (Ne/N)i.sub.e + (Nc/N)i.sub.c,
wherein N represents the number of turns of the windings 6 to 9, Ne represents the number of turns of the winding 10 and Nc represents the number of turns of the winding 11.
In such relation, the base currents i.sub.b1 .about. i.sub.b4 under the on-state of the transistors 1 to 4 are expressed as I.sub.B1 .about. I.sub.B4, respectively. The case, I.sub.B1 .noteq. I.sub.B4 or I.sub.B2 .noteq. I.sub.B3 occurs due to the unbalance between the base-emitter characteristics caused by thermic circumstances or differences in the characteristics of each transistor. On that occasion, the difference in the amount of base storage charges are caused, which develops the following trouble.
Supposing that I.sub.B1 &gt; I.sub.B4, for example, the amount of base storage charges of the transistor 1 becomes larger than that of the transistor 4. As a result, it causes the trouble that the transistor 4 turns into the off-state and the transistors 2 and 3 turn into the on-state, while the transistor 1 still remains on-state. In such a case, a longitudinal current flows from the positive power supply terminal 21 to the negative power supply terminal 22, through collector-emitter of each transistors 1 and 2 being on-state. It decreases the efficiency of the inverter.